DDR2 SDRAM

Zentel DDR2 SDRAM features a double-data-rate architecture with two data transfers per clock cycle. The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture. A bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver. DQS is edge-aligned with data for READs; center-aligned with data for WRITEs Differential clock inputs (CK and /CK). The DLL aligns DQ and DQS transitions with CK transitions.

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Description Datasheet Availability Pricing (EUR) Filter the results in the table by unit price based on your quantity.
Qty. RoHS ECAD Model Type
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Data Bus Width
Maximum Clock Frequency
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Access Time
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
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Zentel Japan DRAM DDR2 512Mb, 32Mx16, 800 at CL5, 1.8V, FBGA-84
Datasheet
733In Stock
Min.: 1
Mult.: 1

SDRAM - DDR2 512 Mbit 16 bit 400 MHz FPGA-84 32 M x 16 400 ps 1.7 V 1.9 V 0 C + 85 C DDR2 Tray
Zentel Japan DRAM DDR2 512Mb, 64Mx8, 800 at CL5, 1.8V, FBGA-60
Datasheet
63In Stock
Min.: 1
Mult.: 1

SDRAM - DDR2 512 Mbit 8 bit 400 MHz FPGA-60 64 M x 8 400 ps 1.7 V 1.9 V 0 C + 85 C DDR2 Tray
Zentel Japan DRAM DDR2 1Gb, 128Mx8, 800 at CL5, 1.8V, FBGA-60
Datasheet
2,398In Stock
Min.: 1
Mult.: 1

SDRAM - DDR2 1 Gbit 8 bit 400 MHz FPGA-60 128 M x 8 400 ps 1.7 V 1.9 V 0 C + 85 C DDR2 Tray
Zentel Japan DRAM DDR2 512Mb, 32Mx16, 800 at CL5, 1.8V, FBGA-84, 105C
Datasheet
Non-Stocked Lead-Time 20 Weeks
Min.: 2,000
Mult.: 2,000

SDRAM - DDR2 512 Mbit 16 bit 400 MHz FPGA-84 32 M x 16 400 ps 1.7 V 1.9 V - 40 C + 105 C DDR2 Tray
Zentel Japan DRAM DDR2 512Mb, 32Mx16, 800 at CL5, 1.8V, FBGA-84, Ind. Temp.
Datasheet
Non-Stocked Lead-Time 20 Weeks
Min.: 2,000
Mult.: 2,000

SDRAM - DDR2 512 Mbit 16 bit 400 MHz FPGA-84 32 M x 16 400 ps 1.7 V 1.9 V - 40 C + 95 C DDR2 Tray
Zentel Japan DRAM DDR2 512Mb, 32Mx16, 1066 at CL7, 1.8V, FBGA-84
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 2,000
Mult.: 2,000

SDRAM - DDR2 512 Mbit 16 bit 533 MHz FPGA-84 32 M x 16 350 ps 1.7 V 1.9 V 0 C + 85 C DDR2 Tray
Zentel Japan DRAM DDR2 1Gb, 64Mx16, 800 at CL5, 1.8V, FBGA-84
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1

SDRAM - DDR2 1 Gbit 16 bit 400 MHz FPGA-84 64 M x 16 400 ps 1.7 V 1.9 V 0 C + 85 C DDR2 Tray
Zentel Japan DRAM DDR2 1Gb, 64Mx16, 800 at CL5, 1.8V, FBGA-84, 105C
Datasheet
Non-Stocked Lead-Time 20 Weeks
Min.: 2,000
Mult.: 2,000

SDRAM - DDR2 1 Gbit 16 bit 400 MHz FPGA-84 64 M x 16 400 ps 1.7 V 1.9 V - 40 C + 105 C DDR2 Tray
Zentel Japan DRAM DDR2 1Gb, 64Mx16, 800 at CL5, 1.8V, FBGA-84, Ind. Temp.
Datasheet
Non-Stocked Lead-Time 20 Weeks
Min.: 2,000
Mult.: 2,000

SDRAM - DDR2 1 Gbit 16 bit 400 MHz FPGA-84 64 M x 16 400 ps 1.7 V 1.9 V - 40 C + 95 C DDR2 Tray
Zentel Japan DRAM DDR2 1Gb, 64Mx16, 1066 at CL7, 1.8V, FBGA-84
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 2,000
Mult.: 2,000

SDRAM - DDR2 1 Gbit 16 bit 533 MHz FPGA-84 64 M x 16 350 ps 1.7 V 1.9 V 0 C + 85 C DDR2 Tray