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Semiconductors Embedded Processors & Controllers Digital Signal Processors & Controllers - DSP, DSC

Tradename = SHARC+

Core	Number of Cores	Maximum Clock Frequency	Package/Case	Program Memory Size	L1 Cache Instruction Memory	L1 Cache Data Memory	Operating Supply Voltage	Series	Minimum Operating Temperature	Maximum Operating Temperature
ARM Cortex A5, SHARC+ SHARC+ Reset	2 Core 3 Core Reset	225 MHz, 450 MHz 300 MHz 450 MHz 450 MHz, 450 MHz 500 MHz 500 MHz, 500 MHz ≤ ≥ Reset	BGA-349 BGA-400 BGA-529 LQFP-176 Reset	640 kB ≤ ≥ Reset	2 x 384 kB 2 x 640 kB 32 kB, 2 x 384 kB 32 kB, 2 x 640 kB 32 kB, 384 kB ≤ ≥ Reset	32 kB 32 kB, - ≤ ≥ Reset	1.1 V 1.15 V ≤ ≥ Reset	ADSP-21571 ADSP-21584 ADSP-21587 ADSP-SC571 ADSP-SC572 ADSP-SC573 ADSP-SC584 ADSP-SC587 ADSP-SC589 Reset	0 C - 40 C ≤ ≥ Reset	+ 70 C + 80 C + 85 C + 90 C + 100 C + 105 C ≤ ≥ Reset

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